A Novel Approach of Combining FFT with Ancient Indian Vedic Mathematics

In present scenario every process should be rapid, efficient and simple. Fast Fourier transform (FFT) is an efficient algorithm to compute the N point DFT. It has great applications in communication, signal and image processing and instrumentation. But the Implementation of FFT requires large number of complex multiplications, so to make this process rapid and simple it’s necessary for a multiplier to be fast and power efficient. To tackle this problem Urthva Tirvagbhyam in Vedic mathematics is an efficient method of multiplication [4]. Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculations based on 16 Sutras. Employing these techniques in the computation algorithms of the coprocessor will reduce the complexity, execution time, area, power etc. Urdhva Tiryakbhyam one of the sutra of Vedic Mathematics, being a general multiplication formula, is equally applicable to all cases of multiplication. The conventional multiplication method requires more time & area on silicon than Vedic algorithms [8]. More importantly processing speed increases with the bit length. This will help ultimately to speed up the signal processing task. The novelty in this paper is Fast Fourier Transform (FFT) design methodology using Vedic mathematics algorithm. By combining these two approaches proposed design methodology is time-area-power efficient.